User Manual 3155
Specifications A-6
Level >2 V into 50Ω, 4V nominal into 10KΩ
Protection Protected against temporary short to case ground
Position Point 0 to n, Programmable with 4-point resolution
Width Programmable with 4 points resolution
Sine Output
Description An output that is directly derived from the sample clock
generator and has an output frequency equal to the
programmed sample clock frequency. This output generates
sine waveform that corresponds to sample clock setting,
including modulated waveform, such as FM, sweep and FSK
Connector Front panel SMB
Impedance 50Ω, ±1%
Level 1 V into 50Ω
Protection Protected against temporary short to case ground
Source Sample clock frequency
Frequency Range and Resolution Same as Sample clock
Flatness -3dB at 100 MHz
Total Harmonic Distortion 0.3% to 100 KHz
-55dBc to 1 MHz
Harmonics and non-related
spurious -45dBc to 10 MHz
-35dBc to 100 MHz
INPUTS
TRIG Input
Connector Front panel BNC
Impedance 10 KΩ, ±5%
Threshold Level TTL
Min Pulse Width 20 ns
Slope Positive or negative going edge.
10 MHz Reference Input
Connector Front panel SMB
Impedance 10 KΩ, ±5%
Threshold Level TTL
Duty Cycle 50%, ±5%
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